Data sheet
4 Chan. ; tpd > 50 ns
Up to 18 V Vcc
Up to 0.6 µA Icc
- Sub-category
- D-type flip-flops
- Package *
- Micro
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 10
Category components COTS: Logic Gates
Data sheet
2 Chan. ; tpd > 5.6 ns
Up to 5.5 V Vcc
Up to 10 µA Icc
- Sub-category
- Unbuffered Inverter
- Package *
- Nano
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 3
Data sheet
2 Chan. Set and reset option
Positive edge-trigger
Up to 6 V Vcc
Up to 40 µA Icc
- Sub-category
- D-type flip-flops
- Package *
- Micro
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 10
Data sheet
tpd < 5.6 ns
Up to 5.5 V Vcc
Up to 10 µA Icc
- Sub-category
- Inverting Buffer
- Package *
- Nano
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 10
Data sheet
4 Chan. ; tpd > 16 ns
Up to 6V Vcc
Up to 10 µA Icc
- Sub-category
- NOR
- Package *
- Micro
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 10
Data sheet
4 Chan. ; tpd > 30 ns
Up to 15V Vcc
Up to 30 µA Icc
- Sub-category
- NAND
- Package *
- Micro
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 10
Data sheet
Binary counter 14 Bits
47 MHz Count Rate
Up to 5.5V Vcc
- Sub-category
- Counters /& Dividers
- Package *
- Standard
- TID [krad]
- Simplified Report provided with order
- SEL LET th [MeV.cm²/mg]
- Simplified Report provided with order
- MOQ
- 10
* Nano : Package Area < 30 [mm²] Micro : 30 [mm²] < Package Area < 60 [mm²] Standard : 60 [mm²] < Package Area < 105 [mm²]